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ST16SF41
Smartcard MCU With 1344 Bytes EEPROM
DATA BRIEFING
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8 BIT ARCHITECTURE CPU 16 KBytes of USER ROM, SECTOR COMBINATIVE 1.5 KByte of SYSTEM ROM 384 Bytes of RAM 1344 Bytes of EEPROM, SECTOR COMBINATIVE - Highly reliable CMOS EEPROM technology - 10 year data retention - 300,000 Erase/Write cycle endurance - Protected One Time Programmable block (32 or 64 bytes) - 1 to 32 bytes block either Erase or Write in single cycle programming
Micromodule (D3)
2 2 2 2
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EXTENDED VOLTAGE OPERATION - VCC Range: 2.7V to 5.5V SERIAL ACCESS, ISO 7816-3 COMPATIBLE POWER SAVING STANDBY MODE UP TO 5 MHz INTERNAL OPERATING FREQUENCY VERY HIGH SECURITY FEATURES INCLUDING EEPROM FLASH ERASE CONTACT ASSIGNMENT COMPATIBLE ISO 7816-2 ESD PROTECTION GREATER THAN 5000V MEETS GSM 11.11 AND 11.12 SPECIFICATIONS 2 OPERATING CONFIGURATIONS - ISSUER - USER
Wafer
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BD.SF41/9809V1
This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29
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ST16SF41
DESCRIPTION The ST16SF41, a member of the standard ST16 device family, is a serial access microcontroller especially designed for high volume and cost competitive Smartcard applications where firmware security algorithm must be implemented. The ST16SF41 is based on 8 bit CPU core and includes on chip memories: 384 Bytes of RAM, 16 KBytes of USER ROM, 1.5 KByte of SYSTEM ROM, and 1344 Bytes of EEPROM. Both ROM and EEPROM memories can be configured into two sectors. Access rules from any memory section or sector to any other are set-up by the User's defined Memory Access Control Matrix (MACM). Reliability data related to the ST16SF41 product manufactured using STMicroelectronics advanced CMOS EEPROM technology confirm data retention up to 10 years and endurance up to 300,000 Erase/Write cycles. As all other ST16 family members, the ST16SF41 is fully compatible with the ISO standards for Smartcard applications. Software development (ROM code, options) can be completed by the ST16-19HDS development system. The ST16SF41 can be delivered either in unsawn or sawn wafers, 180 or 275 micron thickness as well as in micromodule package.
Figure 1. Block Diagram
V GENERATION PP
RAM
8 BIT 384
SYSTEM ROM
1.5 KBtyte
ROM
1615 KBytes
CPU
BYTES
SECTORS COMBIN. SECT. S SECT. A SECT. B
EEPROM 1344 Bytes SECTORS COMBINATIVE SECTOR A SECTOR B
MEMORY ACCESS CONTROL MATRIX
CLK
INTERNAL BUS RST
SERIAL I/0's INTERFACE
NUMBER GENERATOR
SECURITY LOGIC V CC
I/O1
I/O2
GND
SCP 102b/DS
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